1. Field of the Invention
The present invention relates to a shift register, and more particularly, to a shift register which is capable of preventing degradation in picture quality of a display device resulting from a spike voltage.
2. Discussion of the Related Art
In order to sequentially drive gate lines of a display device, there is a need for a shift register to supply scan pulses to the gate lines in order. The shift register includes a plurality of stages for outputting the scan pulses, respectively. The output terminal of each stage is connected one-to-one to a corresponding one of the gate lines. Each gate line is connected to corresponding pixels of the display device. In detail, each pixel includes a thin film transistor which is turned on in response to a scan pulse from a corresponding one of the gate lines to charge a data voltage from a corresponding one of data lines in a pixel electrode of the corresponding pixel. When data is charged on the corresponding data line, a coupling phenomenon occurs between the data line and the corresponding gate line due to a parasitic capacitor of the thin film transistor. At the moment that the data voltage is applied to the data line, a voltage on the gate line rises together owing to the coupling phenomenon. Although one gate line must be driven only once by one scan pulse for one frame period, a spike voltage induced by this coupling phenomenon is generated on the gate line. As a result, the gate line is driven by the spike voltage even though no scan pulse is applied thereto. Accordingly, for the one frame period, the gate line may be driven more than once and, thus, the thin film transistor may be turned on more than once, thereby causing a wrong data voltage to be supplied to the pixel, resulting in degradation in picture quality. A more serious problem is that a downstream stage may be set or an upstream stage may be reset with undesired timings because this spike voltage may be spread to the downstream stage and upstream stage along this gate line. In this case, a multi-output may be generated from each stage, thereby causing the corresponding gate line to be driven several times as mentioned above. In addition, the lifetime of the shift register may be reduced.
The above problem more frequently occurs particularly in an Electrophoretic Display (EPD) which displays an image by moving black pigment particles and white pigment particles vertically using a field effect. The reason is that the area of a thin film transistor in a pixel in the EPD is much larger than the areas of thin film transistors in pixels in other display devices due to driving characteristics of the EPD. When the thin film transistor becomes larger in area, the parasitic capacitor becomes higher in capacitance and the spike voltage thus becomes higher in level.
FIG. 1 illustrates multi-output generation based on a spike voltage. In FIG. 1, “A” represents the waveform of a (k−2)th scan pulse outputted from a (k−2)th stage and supplied to a (k−2)th gate line, “B” represents the waveform of a kth scan pulse outputted from a kth stage and supplied to a kth gate line, and “C” represents the waveform of a spike voltage generated on the (k−2)th gate line. A multi-output D is generated on the kth gate line by this spike voltage.